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Testing


Modules

Bugs
FPGA prototyping

Detailed Description

Testing strategy
When testing a certain entity, the following testing strategy was adopted:
Two kinds of tests were conducted on pAVR:
Testing pAVR modules
Each pAVR module was separately tested.
The particular tests carried out are presented below, grouped by the entities under test:
Testing the pAVR entity
pAVR as a whole was tested by building an upper entity that embedds a pAVR, its Program Memory and some multiplexers. Those multiplexers are meant to give Program Memory control to the test entity (for properly setting up Program Memory contents) or to pAVR (while pAVR is actually being monitored as it executes intructions from the Program Memory).

The binary file that will be executed by pAVR during the test is automatically loaded into the Program Memory using an ANSI C utility, TagScan. The test entity has a number of tags spread over the source code, as comments. The TagScan utility reads the binary file to be loaded, scans the test file, and inserts VHDL statements into the properly tagged places. These statements load the Program Memory using its own write port. This way of initializing the Program Memory seems more general (and surely more interesting) than using file IO VHDL functions.
The TagScan utility is also used for other purposes. For example, for inserting a certain header in all source files. It is heavily used as a general preprocessor.

Testing pAVR as a whole actually means designing and running binaries that put pAVR on extreme situations.
The following tests are done:

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