head 1.1; branch 1.1.1; access ; symbols noReleaseTag:1.1.1.1 noVendorName:1.1.1; locks ; strict; comment @# @; 1.1 date 2003.02.10.04.04.39; author doru; state Exp; branches 1.1.1.1; next ; 1.1.1.1 date 2003.02.10.04.04.39; author doru; state Exp; branches ; next ; desc @@ 1.1 log @Initial revision @ text @ Sources
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Sources

Sources
The source package contains the following files, in the compiling order:
Test sources
The test sources in this package implement all the tests presented above.
The test source package contains the following files:
Conventions used when writting the VHDL sources
The terminology used reflects the data flow.
For example, `pavr_s4_s6_rfwr_addr1' is assigned in s3 (by the instruction decoder), shifts into `pavr_s5_s6_rfwr_addr1', that finally shifts into `pavr_s6_rfwr_addr1' (terminal register). Only this one carries information actually used by hardware resource managers. This particualr one signalizes an access request to the Register File write port manager.

Process splitting strategy:

Todo:
Replace `next_...' signals family with a (pretty wide) state decoder.
Licensing
Please read the licensing terms.

Generated on Tue Dec 31 20:26:31 2002 for Pipelined AVR microcontroller by doxygen1.2.16
@ 1.1.1.1 log @Importing into repository the new directory structure. @ text @@