head 1.1; branch 1.1.1; access ; symbols noReleaseTag:1.1.1.1 noVendorName:1.1.1; locks ; strict; comment @# @; 1.1 date 2003.02.10.04.05.00; author doru; state Exp; branches 1.1.1.1; next ; 1.1.1.1 date 2003.02.10.04.05.00; author doru; state Exp; branches ; next ; desc @@ 1.1 log @Initial revision @ text @ Port A
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Port A
[Peripherals]

Port A structure
The port A offers 8 bidirectional general purpose IO lines.
Lines 0 and 1 also have alternate functions:
Port A is managed through 3 IO File locations: PORTA, DDRA and PINA.
DDRA sets each pin's direction: DDRA(i)=0 means that line i is input, DDRA(i)=1 means that line i is output.
When writing a value to the port, that value goes into PORTA. If DDRA configures the corresponding lines as outputs, the contents of PORTA will be available on external pins. However, if DDRA configures the lines as inputs (DDRA(i)=0), then: PINA reads the physical value of external lines, rather than PORTA.
Port A schematics

pavr_hwres_iof_perif_pa_01.gif



Generated on Tue Dec 31 20:26:30 2002 for Pipelined AVR microcontroller by doxygen1.2.16
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