head 1.1; branch 1.1.1; access ; symbols noReleaseTag:1.1.1.1 noVendorName:1.1.1; locks ; strict; comment @# @; 1.1 date 2003.02.10.04.04.50; author doru; state Exp; branches 1.1.1.1; next ; 1.1.1.1 date 2003.02.10.04.04.50; author doru; state Exp; branches ; next ; desc @@ 1.1 log @Initial revision @ text @ AVR instruction set
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AVR instruction set

AVR instruction set
Arithmetic Bit & Others Transfer Jump Branch Call
ADD Rd, Rr
ADC Rd, Rr
ADIW Rd+1:Rd, K6

SUB Rd, Rr
SUBI Rd, K8
SBC Rd, Rr
SBCI Rd, K8
SBIW Rd+1:Rd, K6

INC Rd
DEC Rd

AND Rd, Rr
ANDI Rd, K8
OR Rd, Rr
ORI Rd, K8
EOR Rd, Rr

COM Rd
NEG Rd
CP Rd, Rr
CPC Rd, Rr
CPI Rd, K8
SWAP Rd

LSR Rd
ROR Rd
ASR Rd

MUL Rd, Rr*
MULS Rd, Rr
MULSU Rd, Rr
FMUL Rd, Rr
FMULS Rd, Rr
FMULSU Rd, Rr
BSET s
BCLR s
SBI A, b
CBI A, b
BST Rd, b
BLD Rd, b

NOP
BREAK**
SLEEP
WDR
MOV Rd, Rr
MOVW Rd+1:Rd, Rr+1:Rr

IN Rd, A
OUT A, Rr

PUSH Rr
POP Rr

LDI Rd, K8
LDS Rd, K16

LD Rd, X
LD Rd, -X
LD Rd, X+

LDD Rd, Y+K6
LD Rd, -Y
LD Rd, Y+

LDD Rd, Z+K6
LD Rd, -Z
LD Rd, Z+

STS K16, Rr

ST X, Rr
ST -X, Rr
ST X+, Rr

STD Y+K6, Rr
ST -Y, Rr
ST Y+, Rr

STD Z+K6, Rr
ST -Z, Rr
ST Z+, Rr

LPM
LPM Rd, Z
LPM Rd, Z+
ELPM
ELPM Rd, Z
ELPM Rd, Z+

SPM
RJMP K12
IJMP
EIJMP
JMP K22
CPSE Rd, Rr

SBRC Rr, b
SBRS Rr, b

SBIC A, b
SBIS A, b

BRBC s, K7
BRBS s, K7
RCALL K12
ICALL
EICALL
CALL K22

RET
RETI
* Multiplications are fully supported by the pipeline (in terms of timing, wires and registers). However, the multiplication module itself is null-defined in the ALU, and always returns zero for now. It will be defined and plugged into the ALU in a future version of pAVR.
** Italicized instructions are currently not implemented in pAVR.




Generated on Tue Dec 31 20:26:30 2002 for Pipelined AVR microcontroller by doxygen1.2.16
@ 1.1.1.1 log @Importing into repository the new directory structure. @ text @@