head 1.1; branch 1.1.1; access; symbols add:1.1.1.3 update:1.1.1.8 initial:1.1.1.1 samiam95124:1.1.1; locks; strict; comment @# @; 1.1 date 2006.10.06.20.08.00; author samiam95124; state Exp; branches 1.1.1.1; next ; commitid 55f24526b7374567; 1.1.1.1 date 2006.10.06.20.08.00; author samiam95124; state Exp; branches; next 1.1.1.2; commitid 55f24526b7374567; 1.1.1.2 date 2006.10.21.08.41.48; author samiam95124; state Exp; branches; next 1.1.1.3; commitid 72bf4539dcde4567; 1.1.1.3 date 2006.11.01.19.54.50; author samiam95124; state Exp; branches; next 1.1.1.4; commitid 31604548faf04567; 1.1.1.4 date 2006.11.11.11.57.12; author samiam95124; state Exp; branches; next 1.1.1.5; commitid 1fa44555b9f14567; 1.1.1.5 date 2006.11.16.10.21.12; author samiam95124; state Exp; branches; next 1.1.1.6; commitid 3f6c455c3ae54567; 1.1.1.6 date 2006.11.17.10.46.56; author samiam95124; state Exp; branches; next 1.1.1.7; commitid 3e01455d92754567; 1.1.1.7 date 2006.11.19.04.17.41; author samiam95124; state Exp; branches; next 1.1.1.8; commitid 3554455fda5a4567; 1.1.1.8 date 2006.11.19.10.52.53; author samiam95124; state Exp; branches; next ; commitid 51214560374c4567; desc @@ 1.1 log @Initial revision @ text @Xilinx Design Summary
CPU8080 Project Status
Project File: cpu8080.ise Current State: Synthesized
Module Name: testbench
  • Errors:
No Errors
Target Device: xc3s200-5pq208
  • Warnings:
No Warnings
Product Version: ISE 8.2.02i
  • Updated:
Fri Oct 6 08:33:24 2006
 
CPU8080 Partition Summary
No partition information was found.
 
Device Utilization Summary (estimated values)
Logic UtilizationUsedAvailableUtilization
Number of Slices 1139 1920 59%
Number of Slice Flip Flops 371 3840 9%
Number of 4 input LUTs 2153 3840 56%
Number of bonded IOBs 33 141 23%
Number of BRAMs 1 12 8%
Number of GCLKs 2 8 25%
 
Detailed Reports
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentThu Oct 5 23:01:08 2006000
Translation Report     
Map Report     
Place and Route Report     
Static Timing Report     
Bitgen Report     
 
Secondary Reports
Report NameStatusGenerated
Xplorer Report  
@ 1.1.1.1 log @8080 CPU project @ text @@ 1.1.1.2 log @8080 CPU project @ text @d22 1 a22 1 12 Warnings (0 filtered) d28 1 a28 1 Fri Oct 20 22:33:56 2006 d40 1 a40 1 1196 d42 1 a42 1 62% d45 1 a45 1 403 d47 1 a47 1 10% d50 1 a50 1 2253 d52 1 a52 1 58% d60 1 a60 1 2 d62 1 a62 1 16% d75 1 a75 1 Synthesis ReportCurrentFri Oct 20 22:33:56 2006012 Warnings (0 filtered)5 Infos (0 filtered) @ 1.1.1.3 log @8080 CPU project @ text @d10 1 a10 1 Programming File Generated d20 1 a20 1 xc3s1000-4ft256 d22 1 a22 1 182 Warnings (0 filtered) d28 1 a28 1 Wed Nov 1 08:51:46 2006 d36 1 a36 1 Device Utilization Summary d38 10 a47 19 Logic UtilizationUsedAvailableUtilizationNote(s) Total Number Slice Registers 890 15,360 5%       Number used as Flip Flops 802           Number used as Latches 88       d50 8 a57 4 3,884 15,360 25%   d59 1 a59 58 Logic Distribution      Number of occupied Slices 3,425 7,680 44%       Number of Slices containing only related logic 3,425 3,425 100%       Number of Slices containing unrelated logic 0 3,425 0%   Total Number 4 input LUTs 5,760 15,360 37%   Number used as logic 3,884       Number used as a route-thru 196       Number used for Dual Port RAMs 1,680       Number of bonded IOBs 44 173 25%       IOB Flip Flops 9       Number of Block RAMs d61 2 a62 9 24 8%   Number of MULT18X18s 1 24 4%   d65 1 a65 1 3 d67 1 a67 35 37%   Total equivalent gate count for design 278,010       Additional JTAG gate count for IOBs 2,112        
d70 1 d75 6 a80 6 @ 1.1.1.4 log @8080 CPU project @ text @d22 1 a22 1 d28 1 a28 1 d41 1 a41 1 d43 1 a43 1 d47 1 a47 1 d59 1 a59 1 d61 1 a61 1 d68 1 a68 1 d70 1 a70 1 d74 2 a75 2 d81 1 a81 1 d86 1 a86 1 d88 1 a88 1 d92 1 a92 1 d98 1 a98 1 d110 1 a110 1 d112 1 a112 1 d116 1 a116 1 d122 1 a122 1 d124 1 a124 1 d134 1 a134 1 d136 1 a136 1 d140 1 a140 1 d146 1 a146 1 d177 6 a182 6 @ 1.1.1.5 log @8080 CPU project @ text @d22 1 a22 1 d28 1 a28 1 d41 1 a41 1 d47 1 a47 1 d59 1 a59 1 d61 1 a61 1 d68 1 a68 1 d70 1 a70 1 d74 2 a75 2 d81 1 a81 1 d86 1 a86 1 d88 1 a88 1 d92 1 a92 1 d98 1 a98 1 d122 1 a122 1 d124 1 a124 1 d128 1 a128 1 d130 1 a130 1 d140 1 a140 1 d177 6 a182 6 @ 1.1.1.6 log @8080 CPU project @ text @d22 1 a22 1 d28 1 a28 1 d41 1 a41 1 d47 1 a47 1 d59 1 a59 1 d68 1 a68 1 d70 1 a70 1 d74 2 a75 2 d81 1 a81 1 d86 1 a86 1 d92 1 a92 1 d98 1 a98 1 d140 1 a140 1 d177 6 a182 6 @ 1.1.1.7 log @8080 CPU project @ text @d22 1 a22 1 d28 1 a28 1 d41 1 a41 1 d47 1 a47 1 d59 1 a59 1 d68 1 a68 1 d74 2 a75 2 d81 1 a81 1 d86 1 a86 1 d92 1 a92 1 d98 1 a98 1 d140 1 a140 1 d177 6 a182 6 @ 1.1.1.8 log @8080 CPU project @ text @d10 1 a10 1 d16 1 a16 1 d22 1 a22 1 d28 1 a28 1 d35 138 a172 2 d177 6 a182 6 @
Performance Summary
Final Timing Score: 0 Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
Synthesis ReportCurrentWed Nov 1 08:45:16 20060167 Warnings (0 filtered)10 Infos (0 filtered)
Translation ReportCurrentWed Nov 1 08:45:26 2006000
Map ReportCurrentWed Nov 1 08:45:44 200609 Warnings (0 filtered)3 Infos (0 filtered)
Place and Route ReportCurrentWed Nov 1 08:51:14 200602 Warnings (0 filtered)2 Infos (0 filtered)
Static Timing ReportCurrentWed Nov 1 08:51:26 2006002 Infos (0 filtered)
Bitgen ReportCurrentWed Nov 1 08:51:48 200604 Warnings (0 filtered)0
171 Warnings (0 filtered)Sat Nov 11 00:55:57 20066834%5954,20827%3,31243%3,312 3,3123,3126,09439%4,2082065431%11312%225%344,0992,592
Synthesis ReportCurrentSat Nov 11 00:49:18 20060155 Warnings (0 filtered)15 Infos (0 filtered)
Translation ReportCurrentSat Nov 11 00:49:28 2006000
Map ReportCurrentSat Nov 11 00:49:48 2006010 Warnings (0 filtered)3 Infos (0 filtered)
Place and Route ReportCurrentSat Nov 11 00:55:22 200602 Warnings (0 filtered)3 Infos (0 filtered)
Static Timing ReportCurrentSat Nov 11 00:55:34 2006002 Infos (0 filtered)
Bitgen ReportCurrentSat Nov 11 00:55:58 200604 Warnings (0 filtered)0
184 Warnings (0 filtered)Wed Nov 15 08:55:16 20067456574,39128%3,45845%3,458 3,4583,4586,31341%4,391242416%28%415,496
Synthesis ReportCurrentWed Nov 15 08:50:06 20060162 Warnings (0 filtered)14 Infos (0 filtered)
Translation ReportCurrentWed Nov 15 08:50:14 2006000
Map ReportCurrentWed Nov 15 08:50:32 2006013 Warnings (0 filtered)3 Infos (0 filtered)
Place and Route ReportCurrentWed Nov 15 08:54:46 200602 Warnings (0 filtered)3 Infos (0 filtered)
Static Timing ReportCurrentWed Nov 15 08:54:58 2006002 Infos (0 filtered)
Bitgen ReportCurrentWed Nov 15 08:55:18 200607 Warnings (0 filtered)0
182 Warnings (0 filtered)Thu Nov 16 20:16:53 20067446564,3973,44544%3,445 3,4453,4456,3174,397240415,467
Synthesis ReportCurrentThu Nov 16 20:11:26 20060162 Warnings (0 filtered)14 Infos (0 filtered)
Translation ReportCurrentThu Nov 16 20:11:34 2006000
Map ReportCurrentThu Nov 16 20:11:54 2006010 Warnings (0 filtered)3 Infos (0 filtered)
Place and Route ReportCurrentThu Nov 16 20:16:20 200603 Warnings (0 filtered)3 Infos (0 filtered)
Static Timing ReportCurrentThu Nov 16 20:16:34 2006002 Infos (0 filtered)
Bitgen ReportCurrentThu Nov 16 20:16:54 200607 Warnings (0 filtered)0
185 Warnings (0 filtered)Sat Nov 18 17:16:47 20067456574,3793,4473,447 3,4473,4476,3004,379241415,388
Synthesis ReportCurrentSat Nov 18 17:11:40 20060162 Warnings (0 filtered)14 Infos (0 filtered)
Translation ReportCurrentSat Nov 18 17:11:50 2006000
Map ReportCurrentSat Nov 18 17:12:12 2006013 Warnings (0 filtered)3 Infos (0 filtered)
Place and Route ReportCurrentSat Nov 18 17:16:14 200603 Warnings (0 filtered)3 Infos (0 filtered)
Static Timing ReportCurrentSat Nov 18 17:16:26 2006002 Infos (0 filtered)
Bitgen ReportCurrentSat Nov 18 17:16:48 200607 Warnings (0 filtered)0
New  Sat Nov 18 22:46:58 2006
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
Static Timing Report     
Bitgen Report