head 1.1; branch 1.1.1; access ; symbols start':1.1.1.1 cd16:1.1.1; locks ; strict; comment @# @; 1.1 date 2003.08.15.17.25.43; author beckert; state Exp; branches 1.1.1.1; next ; 1.1.1.1 date 2003.08.15.17.25.43; author beckert; state Exp; branches ; next ; desc @@ 1.1 log @Initial revision @ text @-- \ Coprocessor Stub for CD16 -- \ This coprocessor does nothing. You can use it as a starting point for an add-on -- \ processing unit. library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity coprocessor is port (reset, clk: in std_logic; CPA: out std_logic_vector(15 downto 0); -- \ Address for data RAM CPO: out std_logic_vector(15 downto 0); -- \ Output to stack YB: in std_logic_vector(15 downto 0); -- \ Input from data memory DI: in std_logic_vector(15 downto 0); -- \ Input from stack CPctrl: in std_logic_vector(6 downto 0)); -- \ Control end coprocessor; architecture behavioral of coprocessor is -- \ CPctrl(6)='1' when a coprocessor instruction is being decoded. That means CPA is -- \ routed to the data memory's address bus. Various IR bits control read/write of -- \ data memory and stack contents. See CD16.VHD. begin CPA <= YB; CPO <= (others => '0'); end behavioral; @ 1.1.1.1 log @Imported sources @ text @@