Project Name: Mini-Risc core

(See change Log at bottom of page for changes/updates)

Description:

This is a Mini-RISC CPU/Microcontroller that is compatible with the PIC 16C57 from Microchip. Additional information about the instruction set and capabilities can be found at: www.microchip.com

Legal Notice

PIC, Microchip, etc. are Trademarks of Microchip Technology Inc. I have no idea if implementing this core will or will not violate patents, copyrights or cause any other type of lawsuits. I provide this core AS IS, without any warranties. If you decide to build this core, you are responsible for any legal resolutions, such as patents and copyrights, and perhaps others .... This source files may be used and distributed without restriction provided that all copyright statement are not removed from the files and that any derivative work contains the original copyright notices and the associated disclaimer.

THIS SOURCE FILES ARE PROVIDED "AS IS" AND WITHOUT ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT
LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND

FITNESS FOR A PARTICULAR PURPOSE.

Motivation

Compatibility

This design should be fully software compatible to the Microchip Implementation of the PIC 16C57, except for the following extensions:

Performance

Implementing the Core

The only file you should edit if you really want to implement this core, is the 'primitives.v' file. It contains all parts that can be optimized, depending on the technology used. It includes memories, and arithmetic modules. I added a primitives_xilinx,v file and xilinx_primitives.zip which contain primitives for xilinx.

Status

First version of the core is released. Included with the release is also a small test bench and several test programs written in assembly. MPLAB from Microchip, can be used to compile and develop additional code.

The core can be downloaded from OpenCores CVS via cvsweb or via cvsget (use minirisc for module name)

Development Tools

A very nice(and free) development environment with a software simulator is provided by Microchip on their web site. This environment works only on PCs. Various free and chimerical tools are available from third party, just Search the web !

Here is a link to the Microchip Development environment (http://www.microchip.com/10/Tools/PICmicro/DevEnv/)

To-Do

Things that need to be done

  1. Write more test/compliance test vectors
  2. Extensions ?

Author / Maintainer

I have been doing ASIC design, verification and synthesis for over 15 years. This core is only a "midnight hack", and should be used with caution. I'd also like to know if anyone will actually use this core. Please send me a note if you will !

Rudolf Usselmann rudi@asics.ws_NOSPAM

Feel free to send me comments, suggestions and bug reports.

Change Log

6/18/200 RU
- Added this Change Log
- Added "Development Tools" Section|
- Removed speed claims from the "Performance" Section: Need to re-synthsise the core and resolve synthesis tool/backend tool issues.
- added "risc_core_top.v", a top level with tri-state buffers and program memory, to make it look like a real PIC !
- Updated the primitives_xilinx.v so it will work correctly with Synplify and Synopsys FPGA compiler